Title :
Joint optimization for capacitor placement and network reconfiguration for loss reduction in distribution system
Author :
Priyadarshini, Radhika ; Prakash, R. ; Shankaralingappa, C.B.
Author_Institution :
Dept. of EEE, Acharya Inst. of Technol., Bangalore, India
Abstract :
Capacitor placement and network reconfiguration have been widely employed to reduce power losses and to maintain voltage profiles within permissible limits in distribution systems. Reconfiguration method proposed in this paper is based on loop elimination technique. In this method the tie switches and sectionalized switches are operated and network is reconfigured. The Optimal capacitor placement is carried out using Genetic Algorithm(GA). Also, a joint optimization algorithm is proposed for combining network reconfiguration and capacitor placement. IEEE-33 bus test system and 77 bus practical system are considered for the joint optimization technique and the loss reduction is computed, the obtained results shows the effectiveness of the proposed method.
Keywords :
capacitor switching; distribution networks; genetic algorithms; IEEE-33 bus test system; capacitor placement; distribution system; genetic algorithm; joint optimization algorithm; loop elimination technique; loss reduction; network reconfiguration method; power losses; sectionalized switches; tie switches; Capacitors; Energy loss; Joints; Linear programming; Load flow; Optimization; Reactive power; Capacitor placement; Genetic Algorithm; distribution network reconfiguration; energy loss reduction; joint optimization;
Conference_Titel :
Power Electronics, Drives and Energy Systems (PEDES), 2014 IEEE International Conference on
Conference_Location :
Mumbai
Print_ISBN :
978-1-4799-6372-0
DOI :
10.1109/PEDES.2014.7041962