A high-speed, programmable, CSD coefficient FIR filter

Author

Tang, Zhangwen ; Zhang, Jie ; Min, Hao

Author_Institution

ASIC & Syst. State-Key Lab., Fudan Univ., Shanghai, China

Volume

48

Issue

4

fYear

2002

fDate

11/1/2002 12:00:00 AM

Firstpage

834

Lastpage

837

Abstract

A new high-speed, programmable FIR filter is presented, which is a multiplierless filter with CSD encoding coefficients. We propose a new programmable CSD encoding structure to make CSD coefficients programmable. Compared with the conventional FIR structure with Booth multipliers, this coding structure improves the speed of filter and decreases the area. We design a 10-bits, 18-taps video luminance filter with the presented filter structure. The completed filter core occupies 6.8 × 6.8 mm of silicon area in 0.6 μm 2P2M CMOS technology, and its maximum work frequency is 100 MHz.

Keywords

CMOS digital integrated circuits; FIR filters; digital filters; network synthesis; programmable filters; video signal processing; 0.61 micron; 10 bit; 100 MHz; CMOS technology; CSD coefficient FIR filter; CSD encoding coefficients; high-speed FIR filter; maximum work frequency; multiplierless filter; programmable CSD encoding structure; programmable FIR filter; silicon area; video luminance filter; Adders; Application specific integrated circuits; CMOS technology; Encoding; Finite impulse response filter; Frequency; Integrated circuit technology; Laboratories; Parallel processing; Silicon;

fLanguage

English

Journal_Title

Consumer Electronics, IEEE Transactions on

Publisher

ieee

ISSN

0098-3063

Type

jour

DOI

10.1109/TCE.2003.1196409

Filename

1196409