Analysis of Asynchronous Circuits Under Different Delay Assumptions

Abstract—Asynchronous circuits are analyzed from the stand- point of different constraints which may apply to the stray delays (zero-line delays, bounded delays, and the use of delay elements). The relationship between "hazard-free" sequential networks and "speed independent" circuits is illuminated. Speed independence is defined relative to a fundamental mode circuit (which in turn may be described by a flow table); the analysis is carried out from this stand- point. The allowed sequence graph may be used to detect critical races. A circuit is seen to be speed independent if and only if its circuit-derived excitation matrix has no 1-input change critical races. The generalization of the essential hazard has been studied in detail and is shown to be an obstacle to hazard-free realizations when line delays can be arbitrarily large.