Design and implementation of timing model in HDTV encoder

This paper describes timing and synchronization considerations in the development of the third generation HDTV encoder in China. The hardware implementation of STC is given out, which synchronizes with the input video signal precisely. The design of timing stamps such as PCR, presentation time stamp (PTS) and decoding timing stamp (DTS) is discussed in detail. In addition, the implementation method of these timing stamps is presented. To implement the functions such as synchronization of audio and video presentation, frame reordering and buffer manager in the decoder, three empiric formulas are introduced, which are suitable for hardware implementation. The practical testing shows that the encoder is working properly. Compared to the past two HDTV encoders, the timing and synchronization system presented is stable and easy to implement.