DocumentCode :
1190099
Title :
A VLSI algorithm for direct and reverse conversion from weighted binary number system to residue number system
Author :
Alia, Guiseppe ; Martinelli, Enrico
Volume :
31
Issue :
12
fYear :
1984
fDate :
12/1/1984 12:00:00 AM
Firstpage :
1033
Lastpage :
1039
Abstract :
Residue Number Systems (RNS) are proved to be useful in many applications, as for example in signal processing. In this paper, a VLSI computing architecture is proposed for converting an integer number N from the weighted binary representation into and out a residue code based on s moduli. For this architecture a possible layout is given and its complexity is evaluated in terms of area and time. Under several hypotheses on RNS parameters, constructive upper bounds ranging from 0(n^{2} \\log n) to 0(n^{2} \\log \\log n) and from 0(\\log ^{2} n) to 0(\\log n) for area and time, respectively, have been obtained for the direct conversion. On the contrary, constructive upper bounds A = 0(n^{2} \\log n) and T = 0(\\log ^{2} n) have been found independent of the formed hypotheses, for the reverse conversion.
Keywords :
Arithmetic; General circuits and systems theory; VLSI; Very large-scale integration (VLSI); Algorithm design and analysis; Circuits and systems; Computer architecture; Computer science; Education; Graph theory; Mathematics; Signal processing algorithms; Upper bound; Very large scale integration;
fLanguage :
English
Journal_Title :
Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0098-4094
Type :
jour
DOI :
10.1109/TCS.1984.1085465
Filename :
1085465
Link To Document :
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