DocumentCode :
1190241
Title :
Performance and the i860 microprocessor
Author :
Atkins, Mark
Author_Institution :
Intel Corp., Santa Clara, CA, USA
Volume :
11
Issue :
5
fYear :
1991
Firstpage :
24
Lastpage :
27
Abstract :
The internal design of the i860 CPU, which exploits pipelining and parallelism more than previous microprocessors, is described. The i860 uses RISC concepts and memory-performance optimizations in several novel ways. Other innovations include simultaneous floating-point operations similar to digital signal processing, a two-instruction-per-clock mode, fast floating-point pipelines graphics instructions, and high-bandwidth registers and caches on-chip. These features make it one of the fastest single-chip processors available.<>
Keywords :
microprocessor chips; performance evaluation; reduced instruction set computing; Intel microprocessor; RISC; caches; digital signal processing; graphics instructions; high-bandwidth registers; i860 CPU; memory-performance optimizations; microprocessor; parallelism; pipelining; simultaneous floating-point operations; two-instruction-per-clock mode; Bandwidth; Computer aided instruction; Computer architecture; Costs; Hardware; Microprocessors; Parallel processing; Pipeline processing; Reduced instruction set computing; Registers;
fLanguage :
English
Journal_Title :
Micro, IEEE
Publisher :
ieee
ISSN :
0272-1732
Type :
jour
DOI :
10.1109/40.108548
Filename :
108548
Link To Document :
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