DocumentCode :
1190267
Title :
Logic Hazards in Threshold Networks
Author :
Howe, A. Bart ; Coates, Clarence L.
Author_Institution :
IEEE
Issue :
3
fYear :
1968
fDate :
3/1/1968 12:00:00 AM
Firstpage :
238
Lastpage :
251
Abstract :
Abstract—This paper is concerned with the study of logic hazards in threshold gate networks. Eichelberger has proved that logic hazards are not present in a sum-of-product (product-of-sum) realization which realizes all of the 1(0) prime implicants of the given Boolean function.[2]Logic gates of the AND or NOR (OR or NAND) variety realize single l(0) prime implicants; therefore, a gate is required for each 1(0) prime implicant to be realized, and the problem of eliminating logic hazards is straightforward.
Keywords :
Index terms—Combinational logic, logic hazards, static hazards, threshold networks.; Arithmetic; Boolean functions; Hazards; Helium; Intelligent networks; Laboratories; Logic gates; NASA; Network synthesis; Index terms—Combinational logic, logic hazards, static hazards, threshold networks.;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/TC.1968.229097
Filename :
1687325
Link To Document :
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