DocumentCode
1191045
Title
Fast Passivity Verification and Enforcement via Reciprocal Systems for Interconnects With Large Order Macromodels
Author
Saraswat, Dharmendra ; Achar, Ramachandra ; Nakhla, Michel S.
Author_Institution
Dept. of Electron., Carleton Univ., Ottawa, Ont.
Volume
15
Issue
1
fYear
2007
Firstpage
48
Lastpage
59
Abstract
With the ever increasing signal speeds, signal integrity issues of high-speed VLSI designs are presenting increasingly difficult challenges for state-of-the-art modeling and simulation tools. Consequently, characterization and passive macromodeling of high-speed modules such as interconnects, vias, and packages based on tabulated data are becoming important. This paper presents a fast algorithm for passivity verification and enforcement of large order macromodels of scattering parameter based multiport subnetworks. Numerous examples tested on this algorithm demonstrate a significant speed-up compared to the existing algorithms in the literature
Keywords
S-parameters; VLSI; integrated circuit interconnections; integrated circuit modelling; VLSI interconnects; VLSI packages; passivity verification; reciprocal systems; scattering parameter; signal integrity; Circuit simulation; Delay effects; Design automation; Electromagnetic coupling; Integrated circuit interconnections; Iterative algorithms; Packaging; Scattering parameters; Signal design; Very large scale integration; Analog simulation and modeling; VLSI interconnects; VLSI packages; high-frequency modules; passive macromodels; scattering parameters; signal integrity; tabulated data;
fLanguage
English
Journal_Title
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher
ieee
ISSN
1063-8210
Type
jour
DOI
10.1109/TVLSI.2007.891085
Filename
4114368
Link To Document