Imposing a k constraint in recording systems employing post-Viterbi error correction

A strategy for imposing a k constraint without any rate penalty is proposed for recording systems that already employ a post-Viterbi error-correction processor. Although the method is general, we focus on the application to perpendicular magnetic recording. This scheme is based on deliberate insertion of a short pattern, which contains one or more transitions and can be detected by an inner error-detection code, in the prolonged absence of magnetic transitions in the data bit pattern. The post-Viterbi processor attempts an error event correction by examining the likelihoods of a list of error events including the one due to the inserted pattern that forces the k constraint. The signal-to-noise ratio loss compared to the ideal system with k=∞ but perfect timing recovery is negligible at either a fixed bit-error rate or a fixed sector-error rate.