• DocumentCode
    1191129
  • Title

    A switched-capacitor multiplier/divider with digital and analog outputs

  • Author

    Watanabe, Kenzo ; Temes, Gabor C.

  • Volume
    31
  • Issue
    9
  • fYear
    1984
  • fDate
    9/1/1984 12:00:00 AM
  • Firstpage
    796
  • Lastpage
    800
  • Abstract
    A novel switched-capacitor circuit is proposed for digital multiplication and division. The inputs (two binary numbers) are first converted to analog charges by means of binary-weighted capacitor arrays. Then, multiplication or division is performed between these charges to provide the product or ratio in the form of an analog voltage. Finally, the resulting analog voltage is converted to a binary number by successiveapproximation analog-to-digital (A/D) conversion. An error analysis using the charge conservation equation has shown that a 10-bit accuracy is obtainable using this technique with presently available MOS technology. An experimental circuit was built and tested. The results confirmed the principles of operation.
  • Keywords
    Multiplication; Switched-capacitor circuits; Active filters; Books; Circuit synthesis; Circuit theory; Circuits and systems; Electrical engineering; Frequency; Impedance; Scattering; Voltage;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0098-4094
  • Type

    jour

  • DOI
    10.1109/TCS.1984.1085571
  • Filename
    1085571