DocumentCode :
1191397
Title :
R68-32 The IADIC: A Hybrid Computing Element
Author :
Serlin, O.
Issue :
7
fYear :
1968
fDate :
7/1/1968 12:00:00 AM
Firstpage :
718
Lastpage :
718
Abstract :
This paper describes an Integrating Analog-to-Digital Converter whose principle of operation is as follows. The output of an analog integrator is monitored by two comparators for positive and negative overflows with respect to a given level q. The comparators drive a bidirectional counter. After every overflow, a pulse of current is added to the integrator input; the polarity, magnitude, and duration of this pulse are calculated to offset the output of the integrator by the amount q.
Keywords :
Analog-digital conversion; Computer architecture; Computerized monitoring; Counting circuits; Digital-analog conversion; Feedback; Multiplexing; Pulse generation; Reflection; Sampling methods;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/TC.1968.227416
Filename :
1687437
Link To Document :
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