DocumentCode
1191524
Title
A new realizability condition for limit cycle-free state-space digital filters employing saturation arithmetic
Author
Singh, Vimal
Volume
32
Issue
10
fYear
1985
fDate
10/1/1985 12:00:00 AM
Firstpage
1070
Lastpage
1071
Abstract
A criterion for the absence of zero-input limit cycles in state-space digital filters employing saturation arithmetic is presented. An example is given, which brings out the novelity of the present approach.
Keywords
Recursive digital filter wordlength effects; Circuit stability; Digital arithmetic; Digital filters; Limit-cycles; Linear matrix inequalities; Multidimensional signal processing; Nonlinear filters; Speech processing; Symmetric matrices; Testing;
fLanguage
English
Journal_Title
Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0098-4094
Type
jour
DOI
10.1109/TCS.1985.1085612
Filename
1085612
Link To Document