Title :
Arsenic Junction Thermal Stability and High-Dose Boron-Pocket Activation During SPER in nMOS Transistors
Author :
Severi, S. ; Pawlak, B.J. ; Duffy, R. ; Augendre, E. ; Henson, K. ; Lindsay, R. ; De Meyer, K.
Author_Institution :
IMEC, Heverlee
fDate :
3/1/2007 12:00:00 AM
Abstract :
In this letter, thermal stability of arsenic (As) junctions formed by solid-phase epitaxial regrowth and their impact on device performance are investigated. If the temperature does not exceed 800 degC, a 35% junction sheet-resistance improvement over the conventional rapid thermal anneal is observed. The overlap junction resistance is not degraded and transistors, processed exclusively with lowly doped drain junctions, show a significant performance gain. High boron (B)-pocket dose leads to good transistor short-channel effect control, overcoming the B deactivation issue. The impact of B-pocket-related counterdoping and channel-mobility degradation on device characteristics are investigated. In the presence of heavily doped substrates, band-to-band tunneling is the dominant mechanism driving the reverse-bias junction leakage and is higher than the trap-assisted tunneling contribution related to the end-of-range defects
Keywords :
MOSFET; arsenic; boron; rapid thermal annealing; semiconductor doping; semiconductor epitaxial layers; thermal stability; 800 C; B-pocket counterdoping; SPER; arsenic junctions; band-to-band tunneling; boron-pocket activation; channel mobility degradation; nMOS transistors; overlap junction resistance; rapid thermal anneal; reverse-bias junction leakage; solid-phase epitaxial regrowth; thermal stability; transistor short-channel effect control; trap-assisted tunneling contribution; Boron; MOSFETs; Performance gain; Rapid thermal annealing; Rapid thermal processing; Substrates; Temperature; Thermal degradation; Thermal stability; Tunneling; Epitaxial growth; JFETs; MOS devices;
Journal_Title :
Electron Device Letters, IEEE
DOI :
10.1109/LED.2007.891255
