Title :
Low-voltage CMOS transductance cell based on parallel operation of triode and saturation transconductors
Author :
Klumperink, Eric A. M. ; Stroet, P.M.
Author_Institution :
Dept. of Electr. Eng., Twente Univ., Enschede
fDate :
10/27/1994 12:00:00 AM
Abstract :
Recently a new linearity improvement technique for low voltage CMOS transconductors was proposed [by Coban, A.L. in Elect. Lett., vol. 30, p. 1124, 1994]. Tne technique is based on the parallel operation of a triode and saturation transconductor.The authors comment on this paper
Keywords :
CMOS integrated circuits; active networks; electric distortion; linear integrated circuits; linearisation techniques; nonlinear network analysis; triodes; linearity improvement technique; low voltage CMOS transconductors; low-voltage CMOS transductance cell; parallel operation; saturation transconductors; triode transconductors;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19941248
