• DocumentCode
    1191754
  • Title

    New architecture for RFFT calculation

  • Author

    Hidalgo-Lopez, J.A. ; Fernandez, J. ; Herruzo, E. ; Gago, A.

  • Author_Institution
    Dept. de Arquitectura y Tecnologia de Comput. y Elecron., Malaga Univ.
  • Volume
    30
  • Issue
    22
  • fYear
    1994
  • fDate
    10/27/1994 12:00:00 AM
  • Firstpage
    1836
  • Lastpage
    1838
  • Abstract
    A new architecture for the real-FFT (RFFT) calculation is introduced. This implementation reduces the computation time for the RFFT over other conventional implementations. In addition, the architecture is simple and permits a compact microelectronic design
  • Keywords
    computer architecture; fast Fourier transforms; mathematics computing; RFFT calculation; architecture; compact microelectronic design; computation time reduction; real-FFT calculation;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19941289
  • Filename
    329972