Title :
New architecture for RFFT calculation
Author :
Hidalgo-Lopez, J.A. ; Fernandez, J. ; Herruzo, E. ; Gago, A.
Author_Institution :
Dept. de Arquitectura y Tecnologia de Comput. y Elecron., Malaga Univ.
fDate :
10/27/1994 12:00:00 AM
Abstract :
A new architecture for the real-FFT (RFFT) calculation is introduced. This implementation reduces the computation time for the RFFT over other conventional implementations. In addition, the architecture is simple and permits a compact microelectronic design
Keywords :
computer architecture; fast Fourier transforms; mathematics computing; RFFT calculation; architecture; compact microelectronic design; computation time reduction; real-FFT calculation;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19941289
