• DocumentCode
    1191836
  • Title

    Low voltage BiCMOS dynamic logic gates

  • Author

    Chen, H.P. ; Wu, Y.P.

  • Author_Institution
    Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei
  • Volume
    30
  • Issue
    22
  • fYear
    1994
  • fDate
    10/27/1994 12:00:00 AM
  • Firstpage
    1849
  • Lastpage
    1850
  • Abstract
    A low-supply-voltage BiCMOS logic gate is presented which can be used to form a pipelined system using the two-phase nonoverlapping clocks. The new BiCMOS dynamic logic gates have no DC power dissipations and they have full voltage swings. It has been shown that the use of the described feedback technique provides a lower gate delay than previously reported low-voltage designs
  • Keywords
    BiCMOS integrated circuits; integrated logic circuits; logic gates; pipeline processing; BiCMOS dynamic logic gates; DC power dissipations; feedback; gate delay; low-voltage designs; pipelined system; two-phase nonoverlapping clocks; voltage swings;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19941263
  • Filename
    329981
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1191836