DocumentCode
1192204
Title
Associative processing and processors
Author
Krikelis, Anargyros ; Weems, Charles C.
Volume
27
Issue
11
fYear
1994
Firstpage
12
Lastpage
17
Abstract
Associative memory concerns the concept that one idea may trigger the recall of a different but related idea. Traditional computers, however, rely upon a memory design that stores and retrieves data by its address rather than its content. In such a search, every accessed data word must travel individually between the processing unit and the memory. The simplicity of this retrieval-by-address approach has ensured its success, but has also produced some inherent disadvantages. One is the von Neumann bottleneck, where the memory-access path becomes the limiting factor for system performance. A related disadvantage is the inability to proportionally increase the size of a unit transfer between the memory and the processor as the size of the memory scales up. Associative memory, in contrast, provides a naturally parallel and scalable form of data retrieval for both structured data (e.g. sets, arrays, tables, trees and graphs) and unstructured data (raw text and digitized signals). An associative memory can be easily extended to process the retrieved data in place, thus becoming an associative processor. This extension is merely the capability for writing a value in parallel into selected cells.<>
Keywords
associative processing; content-addressable storage; parallel processing; associative memory; associative processing; associative processors; content based retrieval; parallel data retrieval; recall triggering; scalable data retrieval; structured data; system performance; unit transfer size; unstructured data; Associative memory; Associative processing; Circuits; Content based retrieval; Humans; Information retrieval; Limiting; System performance; Tree graphs;
fLanguage
English
Journal_Title
Computer
Publisher
ieee
ISSN
0018-9162
Type
jour
DOI
10.1109/2.330035
Filename
330035
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