Title :
A fully complementary BiCMOS technology for sub-half-micrometer microprocessor applications
Author :
Sun, Shih Wei ; Tsui, Paul G Y ; Somero, Bradley M. ; Klein, Jeff ; Pintchovski, Fabio ; Yeargain, John R. ; Pappert, Bernie ; Bertram, Raymond
Author_Institution :
Motorola Inc., Austin, TX, USA
fDate :
12/1/1992 12:00:00 AM
Abstract :
A modular process architecture has been adopted to develop a versatile yet manufacturable, single-poly, four-level metal, fully complementary BiCMOS technology for sub-0.5-μm microprocessor products. Both the poly-emitter vertical n-p-n and p-n-p bipolar transistors are integrated into a dual-poly (n+/p+) gate CMOS process flow. Using a collector pedestal implant in the emitter window, the n-p-n performance has been enhanced to 26 GHz. Lateral p-n-p and TiSi2 Schottky-barrier diode are also available for circuit applications. Stacking of the tungsten-plug contacts and vias are allowed in the multilevel metallization module. Comparing the CMOS and BiCMOS implementation of a 68030 critical path, 40% speed improvement at 3.3-V Vcc and a CMOS/BiCMOS crossover at 2.2 V have been obtained for this logic BiCMOS technology
Keywords :
BiCMOS integrated circuits; integrated circuit technology; microprocessor chips; 0.5 micron; 2.2 V; 26 GHz; 3.3 V; 68030 critical path; Schottky-barrier diode; TiSi2; W plug contacts; collector pedestal implant; dual-poly gate CMOS process flow; four-level metal; fully complementary BiCMOS technology; lateral p-n-p device; logic technology; microprocessor applications; modular process architecture; multilevel metallization module; p-n-p bipolar transistors; poly-emitter; polycrystalline Si; single poly process; subhalfmicron device dimensions; vertical n-p-n transistors; via stacking; BiCMOS integrated circuits; Bipolar transistors; CMOS process; CMOS technology; Implants; Manufacturing processes; Metallization; Microprocessors; Schottky diodes; Stacking;
Journal_Title :
Electron Devices, IEEE Transactions on
