Single-wafer polysilicon engineering for the improvement of over erase in a 0.18-μm floating-gate flash memory

Author

Luoh, Tuung ; Han, Tzung-Ting ; Yang, Yun-Chi ; Chen, Kuang-Chao ; Shih, Hsueh-Hao ; Hwang, Yaw-Lin ; Hsueh, Cheng-Chen ; Chung, Henry ; Pan, Sam ; Lu, Chih-Yuan

Author_Institution

Si Lab., Macronix Int. Corp. Ltd., Hsinchu, Taiwan

Volume

16

Issue

2

fYear

2003

fDate

5/1/2003 12:00:00 AM

Firstpage

155

Lastpage

164

Abstract

A new polysilicon grain engineering technology for the improvement of over erase in 0.18-μm floating-gate flash memory has been developed with the use of single-wafer polysilicon processing, which makes it practical to use hydrogen as a process variable. The addition of hydrogen in polysilicon deposition significantly alters the reaction kinetics and produces polysilicon thin film of smooth surface, fine and uniformly distributed grains. Such a micrograin polysilicon possesses show excellent high-temperature stability. The benefits of the micrograin polysilicon are to be demonstrated through its improvement in over erase of a 0.18-μm floating-gate flash memory.

Keywords

CVD coatings; elemental semiconductors; flash memories; grain refinement; semiconductor thin films; silicon; 0.18 micron; LPCVD growth; Si; floating-gate flash memory; high-temperature stability; micrograin polysilicon thin film; over erase; reaction kinetics; single-wafer polysilicon grain engineering technology; surface morphology; Flash memory; Grain boundaries; Grain size; Hydrogen; Kinetic theory; Nonvolatile memory; Sputtering; Surface morphology; Threshold voltage; Tunneling;

fLanguage

English

Journal_Title

Semiconductor Manufacturing, IEEE Transactions on

Publisher

ieee

ISSN

0894-6507

Type

jour

DOI

10.1109/TSM.2003.810937

Filename

1198022