• DocumentCode
    1194406
  • Title

    Computationally efficient modeling of wafer temperatures in a low-pressure chemical vapor deposition furnace

  • Author

    He, Qinghua ; Qin, S.Joe ; Toprac, Anthony J.

  • Author_Institution
    Univ. of Texas, Austin, TX, USA
  • Volume
    16
  • Issue
    2
  • fYear
    2003
  • fDate
    5/1/2003 12:00:00 AM
  • Firstpage
    342
  • Lastpage
    350
  • Abstract
    A new thermal model is developed to predict wafer temperatures within a hot-wall low pressure chemical vapor deposition furnace based on the furnace wall temperatures as measured by thermocouples. Based on an energy balance of the furnace system, this model is a transformed linear model which captures the nonlinear relationship between the furnace wall temperature distribution and the wafer temperature distribution. The model can be solved with a direct algorithm instead of iterative algorithms which are used in all existing thermal models. Since the direct algorithm is noniterative, there is no convergence problem, nor local minima problem, related to nonlinear optimization. In addition, the direct algorithm greatly reduces the computation effort. Configuration factors are calculated by a finite area to finite area method. This avoids numerical integration methods which are much more difficult to implement and require more computation. The simplicity of the model form and the fast algorithm make the model useful for real-time updating and control. Model predictions show excellent agreement with experimental data.
  • Keywords
    chemical vapour deposition; process control; semiconductor process modelling; sensitivity analysis; temperature distribution; computation effort; computationally efficient modeling; configuration factors; control-relevant modeling; direct algorithm; fast algorithm; finite area to finite area method; furnace system energy balance; furnace wall temperature distribution; furnace wall temperatures; hot-wall low pressure chemical vapor deposition furnace; low-pressure chemical vapor deposition furnace; sensitivity analysis; thermal model; thermocouples; transformed linear model; wafer temperature distribution; wafer temperatures; Chemical vapor deposition; Computational modeling; Energy capture; Furnaces; Iterative algorithms; Predictive models; Pressure measurement; Semiconductor device modeling; Temperature distribution; Temperature measurement;
  • fLanguage
    English
  • Journal_Title
    Semiconductor Manufacturing, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0894-6507
  • Type

    jour

  • DOI
    10.1109/TSM.2003.811883
  • Filename
    1198048