• DocumentCode
    1195141
  • Title

    A functional MOS transistor featuring gate-level weighted sum and threshold operations

  • Author

    Shibata, Tadashi ; Ohmi, Tadahiro

  • Author_Institution
    Dept. of Electr. Eng., Tohoku Univ., Sendai, Japan
  • Volume
    39
  • Issue
    6
  • fYear
    1992
  • fDate
    6/1/1992 12:00:00 AM
  • Firstpage
    1444
  • Lastpage
    1455
  • Abstract
    A functional MOS transistor is proposed which works more intelligently than a mere switching device. The functional transistor calculates the weighted sum of all input signals at the gate level, and controls the `on´ and `off´ of the transistor based on the result of such a weighted sum operation. Since the function is quite analogous to that of biological neurons, the device is named a neuron MOSFET, or neuMOS (vMOS). The device is composed of a floating gate and multiples of input gates that capacitively interact with the floating gate. As the gate-level sum operation is performed in a voltage mode utilizing the capacitive coupling effect, essentially no power dissipation occurs in the calculation, making the device ideal for ULSI implementation. The basic characteristics of neuron MOSFETs as well as of simple circuit blocks are analyzed based on a simple transistor model and experiments. Making use of its very powerful function, a number of interesting circuit applications are explored. A soft hardware logic circuit implemented by neuMOS transistors is also proposed
  • Keywords
    MOS integrated circuits; insulated gate field effect transistors; integrated logic circuits; neural nets; semiconductor device models; ULSI implementation; biological neurons; capacitive coupling effect; floating gate; functional MOS transistor; gate-level weighted sum; input gate multiples; neuMOS transistors; neuron MOSFET; soft hardware logic circuit; threshold operations; transistor model; Hardware; Integrated circuit interconnections; Inverters; Logic circuits; MOSFET circuits; Material properties; Neurons; Silicon; Ultra large scale integration; Voltage;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/16.137325
  • Filename
    137325