DocumentCode :
119524
Title :
RPSim: A Rapid Prototyping Full-System Simulator for SoC Software Development
Author :
Haojun Wang ; Qinghao Min ; Yi Li ; Weihua Zhang
Author_Institution :
Software Sch., Fudan Univ., Shanghai, China
fYear :
2014
fDate :
6-8 Aug. 2014
Firstpage :
259
Lastpage :
267
Abstract :
Nowadays, the release of SoC products has come to a burst. Time-to-market of these products has been shortened to an extreme, nearly 8 to 12 months. To reduce production period, hardware architects generally combine well-tuned IP cores in their designs. To guarantee the process of SoC software development, which will finally decide the release time of products, a fast prototyping simulation platform for SoC software development should be available as soon as possible after hardware design. However, state-of-the-art SoC simulators lack the support for fast integration of IP core and require time-consuming compiler chain modifications for new instructions. In this paper, we present Prism, an extensible and easy-to-use full-system SoC simulation platform for SoC software development. Two mechanisms are designed and implemented to support fast prototyping for new IP core simulation or new instruction extension without compiler tool chain modifications. First, a hardware and software hybrid mechanism is proposed for IP core fast prototyping. A seamless interface is used to eliminate the differences among IP cores. Second, a configurable library mechanism is designed for new instruction extension. Register dependence can be maintained for detailed timing simulation without compiler tool chain modification. In such a design, the major effort for extension is to specify the elaborate common customization interface. Experimental results show these mechanisms only involve about 0.36% runtime overhead. Based on RPSim, a graduate student only needs write about 40 lines of code and takes less than half an hour to extend a new IP core simulation in RPSim.
Keywords :
software engineering; system-on-chip; IP core fast prototyping; Internet protocol; RPSim; SoC software development; compiler chain modifications; configurable library mechanism; rapid prototyping full-system simulator; system-on-chip; Field programmable gate arrays; Frequency modulation; IP networks; Libraries; Software; System-on-chip; Timing; SoC; full-system simulation; rapid prototyping;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Networking, Architecture, and Storage (NAS), 2014 9th IEEE International Conference on
Conference_Location :
Tianjin
Type :
conf
DOI :
10.1109/NAS.2014.45
Filename :
6923188
Link To Document :
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