DocumentCode :
1195310
Title :
Short-circuit power dissipation estimation for CMOS logic gates
Author :
Vemuru, Srinivasa R ; Scheinberg, Norman
Author_Institution :
Dept. of Electr. Eng., City Coll. of New York, NY, USA
Volume :
41
Issue :
11
fYear :
1994
fDate :
11/1/1994 12:00:00 AM
Firstpage :
762
Lastpage :
765
Abstract :
Short-circuit power dissipation contributes significantly to the overall power dissipation in ICs. A new formula has been developed for the estimation of short-circuit power dissipation in CMOS logic gates based on the α-power law model that includes velocity saturation effects of short channel MOSFETs. A technique is developed for the measurement of short-circuit current and power dissipation of CMOS logic gates for use in circuit simulation. SPICE simulation results show that the new formula is significantly more accurate than existing formulae
Keywords :
CMOS logic circuits; SPICE; circuit analysis computing; logic gates; short-circuit currents; α-power law model; CMOS logic gates; SPICE simulation; circuit simulation; power dissipation measurement; short channel MOSFETs; short-circuit current measurement; short-circuit power dissipation estimation; velocity saturation effects; CMOS logic circuits; Chaos; Circuit simulation; Logic devices; Logic gates; MOS devices; MOSFETs; Power dissipation; Semiconductor device modeling; Voltage;
fLanguage :
English
Journal_Title :
Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on
Publisher :
ieee
ISSN :
1057-7122
Type :
jour
DOI :
10.1109/81.331533
Filename :
331533
Link To Document :
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