Title :
Systolic frequency dividers/counters
Author :
Pekmestzi, K.Z. ; Thanasouras, N.
Author_Institution :
Div. of Comput. Sci., Nat. Tech. Univ. of Athens, Greece
fDate :
11/1/1994 12:00:00 AM
Abstract :
The operation of systolic counters, based on the pipelining of the conventional binary counters, is examined. The application of these circuits in the implementation of frequency dividers/counters is also presented. The proposed systolic counters have small circuit complexity and permit very high speed operation
Keywords :
counting circuits; flip-flops; frequency dividers; pipeline processing; systolic arrays; very high speed integrated circuits; binary counters; pipelining; systolic counters; systolic frequency dividers; very high speed operation; Binary codes; Clocks; Complexity theory; Counting circuits; Flip-flops; Frequency conversion; Frequency synthesizers; Pipeline processing; Propagation delay; Very large scale integration;
Journal_Title :
Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on
