• DocumentCode
    1195802
  • Title

    Contention resolution algorithm for common subexpression elimination in digital filter design

  • Author

    Xu, Fei ; Chang, Chip-Hong ; Jong, Ching-Chuen

  • Author_Institution
    Centre for Integrated Circuits & Syst., Nanyang Technol. Univ., Singapore
  • Volume
    52
  • Issue
    10
  • fYear
    2005
  • Firstpage
    695
  • Lastpage
    700
  • Abstract
    In this paper, a new algorithm, called contention resolution algorithm for weight-two subexpressions (CRA-2), based on an ingenious graph synthesis approach has been developed for the common subexpression elimination of the multiplication block of digital filter structures. CRA-2 provides a leeway to break away from the local minimum and the flexibility of varying optimization options through a new admissibility graph. It manages two-bit common subexpressions and aims at achieving the minimal logic depth as the primary goal. The performances of our proposed algorithm are analyzed and evaluated based on benchmarked finite-impulse-response filters and randomly generated data. It is demonstrated that CRA-2 achieves the shortest logic depth with significant reduction in the number of logic operators compared with other reported algorithms.
  • Keywords
    IIR filters; graph theory; logic design; CRA-2; contention resolution algorithm; digital filter; finite-impulse-response filters; graph synthesis; logic operators; multiple constants multiplication; Algorithm design and analysis; Costs; Digital filters; Digital signal processing; Finite impulse response filter; Helium; Logic; Performance analysis; Performance evaluation; Signal processing algorithms; Common subexpression elimination (CSE); logic depth; multiple constants multiplication;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems II: Express Briefs, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1549-7747
  • Type

    jour

  • DOI
    10.1109/TCSII.2005.851776
  • Filename
    1519662