DocumentCode :
1196605
Title :
Block implementation of half-plane digital filters
Author :
Gnanasekaran, R.
Volume :
34
Issue :
3
fYear :
1987
fDate :
3/1/1987 12:00:00 AM
Firstpage :
308
Lastpage :
313
Abstract :
This communication deals with the derivation of a block implementation equation for asymmetric half-plane digital filters. First, a half-plane block transformation concept is developed which is essentially a matrix formulation for the computation of the products of two-sided polynomials and one-sided power series. Using this, a basic block equation is derived for the half-plane digital filters. It is also reasoned that the block computation of half-plane filters can be accomplished only in terms of blocks of samples in a row or a column, as opposed to the computation in terms of subarrays in the case of quarter-plane filters.
Keywords :
Multidimensional digital filters; Recursive digital filters; Arithmetic; Circuits; Convolution; Digital filters; Equations; Gold; Iterative algorithms; Notice of Violation; Polynomials; Very large scale integration;
fLanguage :
English
Journal_Title :
Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0098-4094
Type :
jour
DOI :
10.1109/TCS.1987.1086127
Filename :
1086127
Link To Document :
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