Title :
Adaptive WTA With an Analog VLSI Neuromorphic Learning Chip
Author :
Häfliger, Philipp
Author_Institution :
Inst. of Informatics, Oslo Univ.
fDate :
3/1/2007 12:00:00 AM
Abstract :
In this paper, we demonstrate how a particular spike-based learning rule (where exact temporal relations between input and output spikes of a spiking model neuron determine the changes of the synaptic weights) can be tuned to express rate-based classical Hebbian learning behavior (where the average input and output spike rates are sufficient to describe the synaptic changes). This shift in behavior is controlled by the input statistic and by a single time constant. The learning rule has been implemented in a neuromorphic very large scale integration (VLSI) chip as part of a neurally inspired spike signal image processing system. The latter is the result of the European Union research project Convolution AER Vision Architecture for Real-Time (CAVIAR). Since it is implemented as a spike-based learning rule (which is most convenient in the overall spike-based system), even if it is tuned to show rate behavior, no explicit long term average signals are computed on the chip. We show the rule´s rate-based Hebbian learning ability in a classification task in both simulation and chip experiment, first with artificial stimuli and then with sensor input from the CAVIAR system
Keywords :
Hebbian learning; VLSI; convolution; image processing; neural chips; Hebbian learning; analog VLSI neuromorphic learning chip; convolution AER vision architecture for real time; spike based learning rule; spike signal image processing; very large scale integration chip; Computational modeling; Computer architecture; Convolution; Hebbian theory; Image processing; Neuromorphics; Neurons; Signal processing; Statistics; Very large scale integration; Classification; competitive Hebbian learning; neuromorphic electronics; winner-take-all (WTA); Analog-Digital Conversion; Artificial Intelligence; Biomimetic Materials; Computers, Analog; Equipment Design; Equipment Failure Analysis; Game Theory; Neural Networks (Computer); Pattern Recognition, Automated; Semiconductors; Signal Processing, Computer-Assisted;
Journal_Title :
Neural Networks, IEEE Transactions on
DOI :
10.1109/TNN.2006.884676