DocumentCode :
1197906
Title :
A Josephson 2-bit arithmetic logic unit
Author :
Nakagawa, H. ; Kurosawa, I. ; Takada, S.
Volume :
34
Issue :
9
fYear :
1987
fDate :
9/1/1987 12:00:00 AM
Firstpage :
1123
Lastpage :
1124
Abstract :
A Josephson 2-bit arithmetic logic unit (ALU) is presented. A four-junction logic (4JL) gate-family is used in the ALU circuit. The ALU circuit is designed based on a dual-rail logic to perform both the arithmetic and the logic functions. The circuit was fabricated with Nb/Al-oxide/Nb tunnel junctions using a 3- 
minimum line width technology. For each 16 functions, the circuit was completely confirmed in consistent logic operations. The operating time was measured to be 165 ps in the arithmetic function of subtraction, 
minus 
. Power dissipation was estimated to be 581 
in the circuit.
minimum line width technology. For each 16 functions, the circuit was completely confirmed in consistent logic operations. The operating time was measured to be 165 ps in the arithmetic function of subtraction, minus . Power dissipation was estimated to be 581 in the circuit.Keywords :
Arithmetic; Computer arithmetic; Josephson device logic; Arithmetic; Josephson junctions; Logic circuits; Logic design; Logic functions; Niobium; Oxidation; Power dissipation; Resistors; Voltage;
fLanguage :
English
Journal_Title :
Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0098-4094
Type :
jour
DOI :
10.1109/TCS.1987.1086253
Filename :
1086253
Link To Document :
