Title :
A CMOS square-law programmable floating resistor independent of the threshold voltage
Author :
Sakurai, Satoshi ; Ismail, Mohammed
Author_Institution :
Dept. of Electr. Eng., Ohio State Univ., Columbus, OH, USA
fDate :
8/1/1992 12:00:00 AM
Abstract :
A CMOS architecture for a floating linear resistor which exploits the square-law model of the MOS transistor is presented. The architecture is programmable by DC control voltage and is easily modified such that it is threshold-voltage independent, allowing large signal handling and immunity to substrate noise. Design trade-offs and device size optimization are investigated. Second-order effects due to mobility degradation and channel length modulation are analyzed and a simple high frequency model for the resistor is developed. The architecture is fabricated in a 2 μm p-well CMOS MOSIS process. The resistor occupies 210 μm×270 μm, consumes 0.4-4.0 mW with ±5 V supply and exhibits a signal (at 1% THD) to noise ratio of more than 100 dB over a 1 V range of the DC control voltage
Keywords :
CMOS integrated circuits; carrier mobility; frequency response; integrated circuit technology; resistors; semiconductor device models; -5 V; 0.4 to 4 mW; 2 micron; 5 V; CMOS architecture; DC control voltage; HF model; MOS transistor; channel length modulation; floating linear resistor; high frequency model; large signal handling; mobility degradation; p-well CMOS MOSIS process; square-law model; square-law programmable; threshold-voltage independent; CMOS process; Degradation; Design optimization; Frequency; MOSFETs; Resistors; Semiconductor device modeling; Signal to noise ratio; Threshold voltage; Voltage control;
Journal_Title :
Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on
