Title :
Circuit partitioning simplified
Author :
Rohrer, Ronald A.
Author_Institution :
Dept. of Electr. & Comput. Eng., Carnegie-Mellon Univ., Pittsburgh, PA, USA
fDate :
1/1/1988 12:00:00 AM
Abstract :
The key concepts of `tearing´ are presented. Tearing is a means of circuit partitioning with a formal mechanism for piecing together the subcircuit solutions to yield the composite result. The implications of a single `torn´ element are examined, and the pertinent results for multiple partitioning are discussed
Keywords :
network analysis; circuit partitioning; multiple partitioning; network analysis; tearing´; Admittance; Circuit theory; Computer simulation; Equations; Impedance; Integrated circuit yield; Linear circuits; Linearity; Voltage measurement;
Journal_Title :
Circuits and Systems, IEEE Transactions on
