Title :
A 64-bit microprocessor in 130-nm and 90-nm technologies with power management features
Author :
Rohrer, Norman J. ; Lichtenau, Cédric ; Sandon, Peter A. ; Kartschoke, Paul ; Cohen, Erwin ; Canada, Miles G. ; Pflüger, Thomas ; Ringler, Mathew I. ; Hilgendorf, Rolf B. ; Geissler, Stephen ; Zimmerman, Jeffrey S.
Author_Institution :
IBM Corp., Essex Junction, VT, USA
Abstract :
The first two members in a family of 64-bit superscalar microprocessors are presented. The 130-nm processor, which was introduced first, offers 5-way instruction dispatch, support for 4-way integer and floating-point single-instruction multiple-data (SIMD) operations, a 512-kB second level (L2) cache, and a high-speed external bus. The 90-nm processor is a technology remap of the 130-nm design. It retains the features of the 130-nm processor and adds others, including a new power management facility. The architecture, device characteristics, power management, and thermal details of these two processors are described. In addition, the dataflow layout, aspects of the circuit design, clocking, and timing are discussed.
Keywords :
CMOS integrated circuits; integrated circuit design; microprocessor chips; nanotechnology; parallel processing; 130 nm; 130-nm technology; 5-way instruction dispatch; 512 kbit; 64 bits; 90 nm; 90-nm technology; CMOS integrated circuits; dataflow layout; floating-point single-instruction multiple-data operations; high-speed external bus; power management features; second level cache; silicon-on-insulator technology; superscalar microprocessors; Circuit synthesis; Clocks; Energy management; Integrated circuit technology; Microarchitecture; Microprocessors; Silicon on insulator technology; Technology management; Thermal management; Timing; CMOS integrated circuits; microprocessors; silicon-on-insulator technology;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.2004.838022
