DocumentCode :
1199339
Title :
A 300-MHz 25-μA/Mb-leakage on-chip SRAM module featuring process-variation immunity and low-leakage-active mode for mobile-phone application processor
Author :
Yamaoka, Masanao ; Shinozaki, Yoshihiro ; Maeda, Noriaki ; Shimazaki, Yasuhisa ; Kato, Kei ; Shimada, Shigeru ; Yanagisawa, Kazumasa ; Osada, Kenichi
Author_Institution :
Syst. LSI Res. Dept., Hitachi Ltd., Tokyo, Japan
Volume :
40
Issue :
1
fYear :
2005
Firstpage :
186
Lastpage :
194
Abstract :
An on-chip 1-Mb SRAM suitable for embedding in the application processor used in mobile cellular phones was developed. This SRAM supports three operating modes - high-speed active mode, low-leakage low-speed active mode, and standby mode - and uses a subdivisional power-line control (SPC) scheme. The combination of three operating modes and the SPC scheme realizes low-power operation under actual usage conditions. It operates at 300 MHz, with leakage of 25 μA/Mb in standby mode, and 50 μA/Mb at the low-leakage active mode. This SRAM also uses a self-bias write scheme that decreases of minimum operating voltage by about 100 mV.
Keywords :
SRAM chips; cellular radio; low-power electronics; mobile handsets; 1 Mbit; 300 MHz; high-speed active mode; low-leakage low-speed active mode; low-leakage-active mode; mobile-phone application processor; on-chip SRAM module; process-variation immunity; self-bias write scheme; standby mode; subdivisional power-line control; Batteries; Cellular phones; Energy consumption; Large scale integration; Leakage current; MOSFETs; Mobile handsets; Random access memory; System-on-a-chip; Threshold voltage; Application processor; SRAM; cellular phone; low leakage; low power;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.2004.838014
Filename :
1375002
Link To Document :
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