Title :
Benefits of a SoC-specific test methodology
Author :
Quasem, Md Saffat ; Jiang, Zhigang ; Gupta, Sandeep K.
Abstract :
The tradeoff between IP protection and SoC-level test optimization has been an issue for some time. The more IP providers protect their IP, the less flexibility system developers have to control test costs and fault coverage. In this paper, a new approach dynamically extracts IP-related test information or optimizing SoC testing without jeopardizing IP protection.
Keywords :
electronic engineering computing; integrated circuit testing; system-on-chip; IP protection; SoC-level test optimization; SoC-specific test methodology; fault coverage; Circuit faults; Circuit testing; Control systems; Design for testability; Information analysis; Logic testing; Optimization methods; Pattern analysis; Protection; System testing;
Journal_Title :
Design & Test of Computers, IEEE
DOI :
10.1109/MDT.2003.1198688
