• DocumentCode
    1200180
  • Title

    DAC Highlights

  • Author

    Lavagno, Luciano ; Fix, Limor

  • Author_Institution
    Cadence Berkeley Labs
  • Volume
    20
  • Issue
    3
  • fYear
    2003
  • Firstpage
    88
  • Lastpage
    89
  • Keywords
    Circuit noise; Circuit synthesis; Circuit testing; Computer science; Design automation; Dynamic voltage scaling; Electronic design automation and methodology; Formal verification; Hardware; Threshold voltage;
  • fLanguage
    English
  • Journal_Title
    Design & Test of Computers, IEEE
  • Publisher
    ieee
  • ISSN
    0740-7475
  • Type

    jour

  • DOI
    10.1109/MDT.2003.1198690
  • Filename
    1198690