DocumentCode :
1200278
Title :
Experiences with ATE Providing Testability of Microprocessor Boards
Author :
Purks, Stephen R.
Volume :
27
Issue :
2
fYear :
1978
fDate :
6/1/1978 12:00:00 AM
Firstpage :
178
Lastpage :
181
Abstract :
This paper describes studies of microprocessor board testing and specific experiences with boards containing the 8080 microprocessor being tested on GenRad´s 1795 Logic Test System or high-speed 1796 Digital/Analog Test System. We have performed testing of microprocessor boards, based upon simulation using high-level functional models. The recommended test strategy is first to partition test activity into functional subsections of the board and then to increment the speed of test activity in stages. High-speed and synchronization capabilities are desirable features of the tester hardware. It is also desirable to have some simple testability features in the board design, specifically, control of the speed of board activity and control of microprocessor memory accesses. With such favorable conditions, effective testing of the microprocessor board is straightforward. When testability conditions are less than ideal, work-around techniques are required which tend to make test setup more difficult and/or tend to reduce test effectiveness.
Keywords :
Circuit testing; Control design; Hardware; Logic testing; Microprocessor chips; Performance evaluation; Printed circuits; Read only memory; Standards Board; System testing;
fLanguage :
English
Journal_Title :
Instrumentation and Measurement, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9456
Type :
jour
DOI :
10.1109/TIM.1978.4314653
Filename :
4314653
Link To Document :
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