• DocumentCode
    1200761
  • Title

    Split-path enhanced pipeline scheduling

  • Author

    Shim, SangMin ; Moon, Soo-Mook

  • Author_Institution
    Sch. of Electr. Eng. & Comput. Sci., Seoul Nat. Univ., South Korea
  • Volume
    14
  • Issue
    5
  • fYear
    2003
  • fDate
    5/1/2003 12:00:00 AM
  • Firstpage
    447
  • Lastpage
    462
  • Abstract
    Software pipelining increases the loop execution throughput by overlapping the execution of successive iterations in a pipelined fashion. For loops with control flows, however, software pipelining is not straightforward because we need to consider the overlap of more than one execution path. Modulo scheduling simply transforms them into straightline loops through if-conversion which, in effect, achieves a fixed, worst-case initiation interval (||) among all paths. On the other hand, all-path pipelining (APP) and enhanced pipeline scheduling (EPS) can achieve a variable || depending on the path that is taken at execution time. Unfortunately, APP concentrates only on the overlap within the same path, entirely losing the overlap between different paths, whereas EPS attempts to overlap all paths together, failing to produce a tight schedule for each individual path, especially when resource constraints are tight. In this paper, we propose a new approach to EPS called split-path EPS (SP-EPS), which first splits each individual path via tail duplication and then performs EPS in a way to guarantee a tight schedule for each path, while producing a competitive cross-path schedule. We also extend SP-EPS to outer loops such that frequent paths that bypass the inner loop are split and then scheduled by SP-EPS. Our experimental results on nontrivial integer benchmarks show that SP-EPS can achieve as much as a geometric mean of 10 percent speedup over EPS when innermost loops are scheduled by SP-EPS, while it can achieve a geometric mean of 11.9 percent speedup when outer loops are also scheduled by SP-EPS.
  • Keywords
    instruction sets; parallel algorithms; parallel architectures; pipeline processing; processor scheduling; all-path pipelining; competitive cross-path schedule; geometric mean; instruction-level parallelism; modulo scheduling; multipath loops; software pipelining; split path enhanced pipeline scheduling; Kernel; Microprocessors; Moon; Pipeline processing; Processor scheduling; Tail; Throughput;
  • fLanguage
    English
  • Journal_Title
    Parallel and Distributed Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1045-9219
  • Type

    jour

  • DOI
    10.1109/TPDS.2003.1199063
  • Filename
    1199063