An overview of flash architectural developments

Author

Campardo, Giovanni ; Scotti, Marco ; Scommegna, Salvatrice ; Pollara, Sebastiano ; Silvagni, Andrea

Author_Institution

Memory Product Group-Flash Div., STMicroelectronics, Agrate Brianza, Italy

Volume

91

Issue

4

fYear

2003

fDate

4/1/2003 12:00:00 AM

Firstpage

523

Lastpage

536

Abstract

This paper presents a survey of the principal architectures and blocks building up a flash memory, describing how these blocks are designed and how their design has changed over the years to satisfy the new specification requests. For example, the continuous supply voltage reduction aimed at portable electronic solutions has forced designers to find innovative design solutions. An overview of the test modes developed for the flash device not only to debug the chip but also to try to improve reliability is given. Ad hoc test modes are useful to deeply increase the analysis capability. Finally, the test methodology for flash memories, a challenge between the test time reduction and better test coverage, is presented.

Keywords

flash memories; integrated circuit design; integrated circuit reliability; integrated circuit testing; low-power electronics; memory architecture; ad hoc test modes; continuous supply voltage reduction; design solutions; flash architectural developments; flash memory; overview; portable electronic solutions; reliability; specification requests; test coverage; test methodology; test modes; test time reduction; Automatic test equipment; Circuit testing; Decoding; EPROM; Flash memory; Hip; Packaging machines; Read only memory; Stress; Voltage;

fLanguage

English

Journal_Title

Proceedings of the IEEE

Publisher

ieee

ISSN

0018-9219

Type

jour

DOI

10.1109/JPROC.2003.811705

Filename

1199081