• DocumentCode
    1200974
  • Title

    An overview of logic architectures inside flash memory devices

  • Author

    Silvagni, Andrea ; Fusillo, Giuseppe ; Ravasio, Roberto ; Picca, Massimiliano ; Zanardi, Stefano

  • Author_Institution
    Memory Product Group-Flash Div., STMicroelectronics, Agrate Brianza, Italy
  • Volume
    91
  • Issue
    4
  • fYear
    2003
  • fDate
    4/1/2003 12:00:00 AM
  • Firstpage
    569
  • Lastpage
    580
  • Abstract
    In the past few years, the complexity of logic functions and architectures inside a flash memory device has grown in order to face the need for more complex system interfaces and to manage the increased amount of stored data. In this paper, an overview of these developments will be given. The paper is divided into sections describing areas where logic circuits play a key role: program/erase algorithms handling and user interface, redundancy management for yield enhancement, error correction codes to enhance reliability, and burst and page mode access control to enhance read bandwidth.
  • Keywords
    error correction codes; flash memories; integrated circuit reliability; integrated circuit yield; logic design; memory architecture; reviews; storage management; burst mode access control; error correction codes; flash memory devices; logic architectures; multilevel cell; overview; page mode access control; program/erase algorithm handling; read bandwidth enhancement; redundancy management; reliability; stored data management; unerasable programmable ROM; user interface; yield enhancement; Access control; Bandwidth; Error correction codes; Flash memory; Logic circuits; Logic devices; Logic functions; Memory architecture; Redundancy; User interfaces;
  • fLanguage
    English
  • Journal_Title
    Proceedings of the IEEE
  • Publisher
    ieee
  • ISSN
    0018-9219
  • Type

    jour

  • DOI
    10.1109/JPROC.2003.811707
  • Filename
    1199084