DocumentCode
1201519
Title
An efficient profile-based algorithm for scratchpad memory partitioning
Author
Angiolini, Federico ; Benini, Luca ; Caprara, Alberto
Author_Institution
Dipt. di Elettronica, Univ. di Bologna, Italy
Volume
24
Issue
11
fYear
2005
Firstpage
1660
Lastpage
1676
Abstract
Focusing on embedded applications, scratchpad memories (SPMs) look like a best-compromise solution when taking into account performance, energy consumption, and die area. The main challenge in SPM design is to optimally map memory locations to scratchpad locations. This paper describes an algorithm to solve such a mapping problem by means of dynamic programming applied to a synthesizable hardware architecture. The algorithm works by mapping segments of external memory to physically partitioned banks of an on-chip SPM; this architecture provides significant energy savings. The algorithm does not require any user-set bound on the number of partitions and takes into account partitioning overhead. Improving on previous solutions, execution time is polynomial in the number of memory locations, even in the most general solving policy. This has the major practical advantage of allowing an arbitrary number of scratchpad segments, something that was impossible with previous methods, whose running time is exponential to this number. Strategies to optimize memory requirements and speed of the algorithm are exploited. Additionally, we integrate this algorithm in a complete and automated design, simulation, and synthesis flow.
Keywords
digital storage; dynamic programming; embedded systems; integrated memory circuits; logic CAD; logic partitioning; optimisation; design automation; dynamic programming; embedded applications; embedded systems; hardware architecture; logic partitioning; memory requirement optimization; optimal map memory location mapping; profile-based algorithm; scratchpad locations; scratchpad memory partitioning; Algorithm design and analysis; Costs; Dynamic programming; Energy consumption; Hardware; Logic; Partitioning algorithms; Polynomials; Random access memory; Scanning probe microscopy; Design automation; dynamic programming; embedded design; memory hierarchy; partitioning algorithm; power saving; scratchpad memory (SPM);
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/TCAD.2005.852299
Filename
1522435
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