Title :
550 V, N-channel emitter switched thyristors with an atomic-lattice-layout (ALL) geometry
Author :
Bhalla, Anup ; Chow, T. Paul
Author_Institution :
Center for Integrated Electron., Rensselaer Polytech. Inst., Troy, NY, USA
Abstract :
Experimental and simulation results for a 550 V, Atomic-Lattice-Layout (ALL) cell Emitter Switched Thyristor are reported here for the first time and compared to the conventional stripe cell geometry. It is shown that the ALL cell design improves the maximum gate controllable current density of the Emitter Switched Thyristor by 40%, with a small loss in forward performance at current densities less than 400 A/cm/sup 2/.<>
Keywords :
MOS-controlled thyristors; current density; power semiconductor switches; 550 V; ALL cell design; MOS-controlled thyristor; N-channel emitter switched thyristors; atomic-lattice-layout geometry; forward performance; maximum gate controllable current density; stripe cell geometry; Breakdown voltage; Connectors; Current density; Geometry; Insulated gate bipolar transistors; MOSFET circuits; Performance loss; Semiconductor optical amplifiers; Solid modeling; Thyristors;
Journal_Title :
Electron Device Letters, IEEE
