DocumentCode :
1202466
Title :
Three-level inverter configuration cascading two two-level inverters
Author :
Somasekhar, V.T. ; Gopakumar, K.
Author_Institution :
Center for Electron. Design & Technol., Indian Inst. of Sci., Bangalore, India
Volume :
150
Issue :
3
fYear :
2003
fDate :
5/1/2003 12:00:00 AM
Firstpage :
245
Lastpage :
254
Abstract :
A power circuit configuration to realise three-level inversion is proposed. Three-level inversion is realised by connecting two two-level inverters in cascade, in the proposed configuration. An isolated DC power supply is used to supply each inverter in this power circuit. Each DC-link voltage is equal to half of the DC-link voltage in a conventional NPC (neutral point clamped) three-level inverter topology. Neutral point fluctuations are absent, and fast recovery neutral clamping diodes are not needed. The proposed inverter scheme produces 64 space-vector combinations distributed over 19 space-vector locations as compared to 27 combinations in a conventional three-level topology. The present power circuit can be operated as a two-level inverter in the range of lower modulation, by clamping one inverter to a zero state and by switching the other inverter. When compared to the H-bridge topology, this circuit needs one power supply less. A space vector based PWM scheme is used for the experimental verification of the proposed topology.
Keywords :
PWM invertors; bridge circuits; power supplies to apparatus; switching convertors; H-bridge topology; inverter clamping; inverter switching; isolated DC power supply; power circuit; space vector based PWM scheme; space-vector combinations; space-vector locations; three-level inverter configuration; two-level inverters cascade; zero state;
fLanguage :
English
Journal_Title :
Electric Power Applications, IEE Proceedings -
Publisher :
iet
ISSN :
1350-2352
Type :
jour
DOI :
10.1049/ip-epa:20030259
Filename :
1199685
Link To Document :
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