DocumentCode
1202791
Title
A 1 GHz CMOS analog front-end for a generalized PRML read channel
Author
Sun, Daniel ; Xotta, Andrea ; Abidi, Asad A.
Author_Institution
Electr. Eng. Dept., Univ. of California, Los Angeles, CA, USA
Volume
40
Issue
11
fYear
2005
Firstpage
2275
Lastpage
2285
Abstract
A 1 GHz CMOS analog front-end for general partial response maximum likelihood (GPRML) read channel in hard disk drive application has been implemented in 0.35 μm CMOS. A continuous time analog filter fulfills the relaxed equalization for GPRML detection and can save up to 35% power consumption for the whole read channel. An analog DFE-based timing recovery loop is implemented to avoid the extremely long latency in the digital signal processing path (Viterbi decoder). The measured performances is 1.1 dB off simulations at 800 MHz and 1.6 dB off at 1GHz. The chip draws 240 mW from a 3.3 V supply at 800MHz clock and 380 mW from a 3.6 V supply at 1 GHz clock.
Keywords
CMOS analogue integrated circuits; Viterbi decoding; continuous time filters; disc drives; hard discs; maximum likelihood sequence estimation; partial response channels; 0.35 micron; 1 GHz; 240 mW; 3.3 V; 3.6 V; 380 mW; 800 MHz; CMOS analog front-end; Viterbi decoder; analog DFE-based timing recovery loop; continuous time analog filter; digital signal processing; general partial response maximum likelihood; generalized PRML read channel; hard disk drive; Clocks; Delay; Digital signal processing chips; Energy consumption; Filters; Hard disks; Maximum likelihood decoding; Maximum likelihood detection; Timing; Viterbi algorithm; Analog front-end; C-T equalizer; C-T filter; CMOS; DFE; PRML; hard disk drive; read channel; timing recovery;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.2005.857372
Filename
1522567
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