• DocumentCode
    1203926
  • Title

    A High-Speed Digital Divider

  • Author

    Davis, George R. ; King, Thomas M.

  • Volume
    32
  • Issue
    2
  • fYear
    1983
  • fDate
    6/1/1983 12:00:00 AM
  • Firstpage
    309
  • Lastpage
    312
  • Abstract
    This paper describes an efficient method for generating the quotient of two binary numbers at speeds comparable to existing multiplier chips. A digital divider is designed using the BEST LINE segmentation approximation. The reciprocal curve is subdivided into small sections, and a least squares straight line approximation is used to recreate each section. An analysis is presented to determine the segmentation granularity and the binary word length of constants needed to closely approximate the curve. A compromise design based on statistical performance as well as the complexity of the hardware requirements are evaluated.
  • Keywords
    Equations; Government; Hardware; Helium; Integrated circuit manufacture; Least squares approximation; Manufacturing; Monolithic integrated circuits; Table lookup; Taylor series;
  • fLanguage
    English
  • Journal_Title
    Instrumentation and Measurement, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9456
  • Type

    jour

  • DOI
    10.1109/TIM.1983.4315069
  • Filename
    4315069