DocumentCode
1203947
Title
A survey of power estimation techniques in VLSI circuits
Author
Najm, Farid N.
Author_Institution
Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA
Volume
2
Issue
4
fYear
1994
Firstpage
446
Lastpage
455
Abstract
With the advent of portable and high-density microelectronic devices, the power dissipation of very large scale integrated (VLSI) circuits is becoming a critical concern. Accurate and efficient power estimation during the design phase is required in order to meet the power specifications without a costly redesign process. In this paper, we present a review of the power estimation techniques that have recently been proposed.<>
Keywords
VLSI; monolithic integrated circuits; probability; reviews; statistical analysis; VLSI circuits; power dissipation; power estimation techniques; power specifications; review; very large scale integrated circuits; CMOS logic circuits; CMOS technology; Circuit simulation; Design automation; Energy consumption; Energy management; Phase estimation; Power dissipation; Power system management; Very large scale integration;
fLanguage
English
Journal_Title
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher
ieee
ISSN
1063-8210
Type
jour
DOI
10.1109/92.335013
Filename
335013
Link To Document