An ATM switch architecture for provision of integrated broadband services

The author gives some qualitative performance targets to be fulfilled for the service classes proposed by CCITT for the future broadband-ISDN (B-ISDN) and proposes a nonblocking, self-routing asynchronous transfer mode (ATM) switching architecture that is able to fulfil the different performance figures of each class. To exploit the service integration accomplished by ATM switches, the switching bandwidth is allocated at call level and cell level. This allocation gives the flexibility of letting lower-priority services use the reserved bandwidth left temporarily unused by higher-priority services. The architecture adopts mixed input-output queuing. Input queuing is particularly suited to the definition of internal frame structures, making it possible to guarantee the absence of cell loss due to congestion for specific services (such as circuit emulation). Output queuing makes it possible to implement in hardware a switching speedup that practically removes the performance degradation due to the head-of-line blocking phenomenon typical of input queuing