Small-signal and signal-flow-graph modeling of switched Z-source impedance network

The Z-source inverter is a recently proposed converter topology that uses a unique X-shaped impedance network on its dc side for achieving both voltage-buck and boost capabilities. In the process of designing control schemes for the Z-source inverter, knowledge of the transfer function representing its unique dc impedance network is essential. Toward this end, this letter presents dynamic small-signal modeling of the Z-source impedance network using perturbed mathematical analysis and a signal-flow graph with parasitic components taken into consideration. In particular, the developed average control-to-output model reveals the presence of a right-hand-plane zero in the network transfer function, whose trajectories with variations in network parameters can be studied using classical root-locus analyses. Using the graphical signal-flow modeling approach, various disturbance-to-output transfer functions can also be derived with their parameter sensitivity similarly studied. Lastly, simulation and experimental results are presented for verifying the dynamic phenomena identified in this letter.