• DocumentCode
    12068
  • Title

    An Efficient Framework for Power-Aware Design of Heterogeneous MPSoC

  • Author

    Ben Atitallah, Rabie ; Senn, Eric ; Chillet, Daniel ; Lanoe, Mickael ; Blouin, Dominique

  • Author_Institution
    LAMIH, Univ. of Valenciennes, Valenciennes, France
  • Volume
    9
  • Issue
    1
  • fYear
    2013
  • fDate
    Feb. 2013
  • Firstpage
    487
  • Lastpage
    501
  • Abstract
    Currently, designing low-power complex embedded systems is a main challenge for corporations in a large number of electronic domains. There are multiple motivations which lead designers to consider low-power design such as increasing lifetime, improving battery longevity, limited battery capacity, and temperature constraints. Unfortunately, there is a lack of efficient methodology and accurate tool to obtain power/energy estimation of a complete system at different abstraction levels. This paper presents a global framework for power/energy estimation and optimization of heterogeneous multiprocessor system-on-chip (MPSoC). Within this framework, a power modeling methodology is defined, and an open platform is developed. Our methodology takes into account all the embedded system relevant aspects; the software, the hardware, and the operating system. The platform stands for Open Power and Energy Optimization PLatform and Estimator (Open-PEOPLE). It includes diverse estimation tools with respect to their abstraction levels in order to cover the overall design flow. Starting from functional estimation and down to real boards measurements, our platform helps designers to develop new power models, to explore new architectures, and to apply optimization techniques in order to reduce energy and power consumption of the system. The usefulness and the effectiveness of the proposed power estimation framework is demonstrated through a typical embedded system conceived around the Xilinx Virtex II Pro FPGA platform.
  • Keywords
    embedded systems; field programmable gate arrays; integrated circuit design; low-power electronics; multiprocessing systems; optimisation; power aware computing; system-on-chip; Xilinx Virtex II Pro FPGA platform; abstraction levels; electronic domains; energy consumption reduction; energy estimation; functional estimation; heterogeneous MPSoC; heterogeneous multiprocessor system-on-chip optimization; low-power complex embedded system design; open power and energy optimization platform and estimator; open-PEOPLE platform; optimization techniques; power consumption reduction; power estimation; power modeling methodology; power models; power-aware design; Computational modeling; Embedded systems; Estimation; Hardware; Power demand; Program processors; Multiprocessor system-on-chip (MPSoC); power modeling; system-level estimation;
  • fLanguage
    English
  • Journal_Title
    Industrial Informatics, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1551-3203
  • Type

    jour

  • DOI
    10.1109/TII.2012.2198657
  • Filename
    6198327