Linearity optimization of a high power Doherty amplifier based on post-distortion compensation

Author

Cho, Kyoung-Joon ; Kim, Wan-Jong ; Kim, Jong-Heon ; Stapleton, Shawn P.

Author_Institution

Sch. of Eng. Sci., Simon Fraser Univ., Burnaby, BC, Canada

Volume

15

Issue

11

fYear

2005

Firstpage

748

Lastpage

750

Abstract

The linearity of a 30-W high-power Doherty amplifier is optimized using post-distortion compensation. A balanced high-power Doherty amplifier using two push-pull laterally-diffused metal-oxide semiconductor (LDMOS) field-effect transistors (FETs) is linearized by optimum adjustment of the peaking compensation line, shunt capacitors, and gate biases. The measured results of an optimized Doherty amplifier for a four-carrier wideband code division multiple access (W-CDMA) signal, achieved -43 dBc adjacent channel leakage ratio (ACLR) at a ±5 MHz offset frequency. This is an ACLR improvement of 12.2dB and 6.5dB in comparison to the Doherty amplifier before optimization and a ClassAB amplifier, respectively.

Keywords

MOSFET; circuit optimisation; code division multiple access; linearisation techniques; power amplifiers; 12.2 dB; 30 W; 6.5 dB; Doherty amplifier; adjacent channel leakage ratio; class AB amplifier; laterally-diffused metal-oxide semiconductor field-effect transistor; linear power amplifier; post-distortion compensation; shunt capacitors; wideband code division multiple access; Broadband amplifiers; Capacitors; FETs; Frequency conversion; Frequency measurement; High power amplifiers; Linearity; MOS devices; Multiaccess communication; Semiconductor optical amplifiers; Doherty amplifier; linear power amplifier; post-distortion; push-pull; wideband code division multiple access (W-CDMA);

fLanguage

English

Journal_Title

Microwave and Wireless Components Letters, IEEE

Publisher

ieee

ISSN

1531-1309

Type

jour

DOI

10.1109/LMWC.2005.858985

Filename

1525062