Low loss matching (LLM) design technique for power amplifiers

This paper describes a design methodology used for the development of multistage broadband power amplifiers. The method uses the measured small-signal S-parameters and loadpull data in association with low loss matching (LLM) design technique. The Q-point of the amplifier was selected for class-AB operation of the device in order to obtain the maximum power-added efficiency (PAE) and bandwidth. In the design optimization using loadline techniques, four sets of S-parameter data, corresponding to device low gain, high gain, low current, and high current, were used. These data files represent the possible fabrication changes and allow realization of a design more tolerant to process variations.