A 3.3-mW ΣΔ modulator for UMTS in 0.18-μm CMOS with 70-dB dynamic range in 2-MHz bandwidth

Author

van Veldhoven, Robert H.M. ; Minnis, Brian J. ; Hegt, Hans A. ; Van Roermund, Arthur H M

Author_Institution

Philips Res. Labs., Eindhoven, Netherlands

Volume

37

Issue

12

fYear

2002

fDate

12/1/2002 12:00:00 AM

Firstpage

1645

Lastpage

1652

Abstract

A quadrature fourth-order, continuous-time, ΣΔ modulator with 1.5-b quantizer and feedback digital-to-analog converter (DAC) for a universal mobile telecommunication system (UMTS) receiver chain is presented. It achieves a dynamic range of 70 dB in a 2-MHz bandwidth and the total harmonic distortion is -74 dB at full-scale input. When used in an integrated receiver for UMTS, the dynamic range of the modulator substantially reduces the need for analog automatic gain control and its tolerance of large out-of-band interference also permits the use of only first-order prefiltering. An IC including an I and Q ΣΔ modulator, phase-locked loop, oscillator, and bandgap dissipates 11.5 mW at 1.8 V. The active area is 0.41 mm² in a 0.18-μm 1-poly 5-metal CMOS technology.

Keywords

3G mobile communication; CMOS integrated circuits; automatic gain control; circuit feedback; continuous time systems; harmonic distortion; phase locked loops; quantisation (signal); sigma-delta modulation; ΣΔ modulator; 0.18 micron; 1.8 V; 11.5 mW; 2 MHz; 3.3 mW; CMOS; UMTS; analog automatic gain control; dynamic range; feedback digital-to-analog converter; out-of-band interference; phase-locked loop; quadrature fourth-order continuous-time circuit; quantizer; receiver chain; total harmonic distortion; universal mobile telecommunication system; 3G mobile communication; Bandwidth; CMOS technology; Digital modulation; Digital-analog conversion; Dynamic range; Feedback; Gain control; Interference; Total harmonic distortion;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/JSSC.2002.804329

Filename

1088091